1. Field of the Invention
The present invention relates to a method of fabricating a structure by anisotropic etching, and a silicon substrate with an etching mask. More particularly, the present invention relates to a single-crystal silicon substrate with an etching mask, a fabrication method of fabricating a structure like a micro structure, such as a movable body apparatus, by using the silicon substrate, an optical deflector fabricated by the fabrication method, and the like. The optical deflector can be preferably used in, for example, a projection display for projecting an image by deflecting and scanning a light beam, and an image forming apparatus, such as a laser beam printer and a digital copying machine using an electrophotographic process.
2. Related Background Art
Heretofore, a semiconductor process makes it possible to produce a micro mechanical structure on a micrometer order from a silicon substrate. A variety of minute functional devices have been fabricated using such technology. Particularly, optical deflectors produced by such technology are characterized in that, comparing with a light scanning optical system using a rotary polygonal mirror, the optical deflector can be made compact to a large extent, and the consumption power thereof can be reduced.
U.S. Pat. No. 6,831,765 discloses an optical deflector fabricated by using an anisotropic wet etching technology that is a kind of the semiconductor process. Further, Japanese Patent Laid-open Nos. Heisei-6 (1994)-163511 and Heisei-7 (1995)-58345 disclose technologies in which a correction etching mask is used to etch a silicon substrate by the anisotropic wet etching and form a desired target shape (a shape corresponding to a basic etching mask).
In a where a silicon substrate is etched by the anisotropic wet etching to form a target shape with high accuracy, a space is generally necessary for arranging the correction etching mask in addition to the basic etching mask. Especially, when the etching amount is large, a large correction etching mask is needed. Accordingly, there is a considerable limitation to the arrangement of structures, such as micro structures, on a silicon wafer. It is thus likely that the number of structures capable of being fabricated from a silicon wafer decreases, and the reduction in costs becomes difficult to attain.